Hardware Engineer Intern, System Integration
What I did
- Automated MIPI RFFE bus compliance tests in Python (PyVisa, SCPI), cutting runtime from 6 hrs to 4 min.
- Validated SoC PLL clock generation and 4 MIPI CSI camera clocks across temperature with oscilloscopes.
- Characterized PCB laminate Dk/Df to 20 GHz via TDR and VNA S-parameters, correlated to SIPI simulation.
- Redesigned coupon boards for copper surface roughness characterization using AITT and Keysight PLTS.