Industry Experience | Matthew Marsicano

Google

Characterized PCB Dk/Df and copper up to 20 GHz by DCR, TDR, and S-parameter measurements.
Designed coupon structures to IEEE-370 with Delta L+3, Beatty resonators, and 2x-thru de-embedding.
Automated MIPI RFFE compliance validation in PyVISA and SCPI, cutting time from 6 hours to 4 minutes.
Defined two new validation cases for antenna tuner hubs, improving signal integrity and reducing coupling.
Automated camera verification over temperature and validated SoC camera clock generation.

Led characterization of a zero-IF WiFi 7 transceiver IC: DAC, ADC, front end, and SI performance.
Optimized RX/TX test benches, saving 2 hours per chip validation and yielding 6 dB TX EVM improvement.

Characterized an analog ASIC for bench-level power draw and performance across thermal cycling.
Delivered hardware design and test documentation for a GPS receiver conducting satellite monitoring, supporting GPS III validation for the U.S. Space Force.

Designed 2 PCBs in Altium integrating RF, high-speed digital, and low-voltage power measurement.
Automated PCB testbench, reducing bring-up time from 20 minutes to 2 minutes across 300+ devices.
Cut FPGA power consumption by 15% through SystemVerilog revisions and synthesis settings.
Assembled and programmed Xilinx-based RF transmitters for large-scale bistatic communication systems.

Architected C++ modem firmware for latency, fail-over, and security on the custom LTE modem onboard the Sentry security robot.
Cut modem boot time 60% with multithreading and modifications to U-Boot, Yocto, and kernel modules.
Designed 5 API commands for real-time processor control and connection status displays, using multithreading and object-oriented design in C++.
Automated network configuration and security protocols with Bash scripts.